1. Field of the Invention
The present invention relates to the technical field of wireless transmission and, more particularly, to a decoding system of cascaded Low-density Parity-check code (LDPC code) concatenated with 4 Quadrature Amplitude Modulation Nordstrom-Robinson code (4QAM-NR code).
2. Description of Related Art
Low-density parity-check codes (LDPC codes) are known to have a high coding gain in performance and can be easily designed to approach Shannon bound. Also, encoding and/or decoding can be carried out easily thanks to its essential properties of sparse and regular structure in generating and parity check matrices. Hence, the LDPC codes have been widely used in wireless communication systems nowadays.
When LDPC codes are to be decoded, the log-likelihood ratio (LLR) corresponding to each coded bit in a codeword is required to be calculated for better decoding performance. Here, a cascaded coding scheme is considered where the LDPC code serves as an outer code and the decoding information provided by an inner code are sent to find the needed LLR for LDPC decoding. In such a scenario, computation of LLR becomes complicated. US Patent Publication No. 2007/0260959 discloses employing piecewise linear approximation skill to simplify LLR calculation, it does not consider code concatenation.
To demonstrate how a cascaded LDPC code works, a configuration of a digital television/terrestrial multimedia broadcast (DTMB) system 100 including LDPC code operated at 4QAM-NR modulation is illustrated as shown in FIG. 1. FIG. 2 depicts operation of the Nordstrom Robinson (NR) encoder 110 appearing in FIG. 1. As shown in FIGS. 1 and 2, the NR encoder 110 maps successive 8 information bits into 16 coded bits, where a0 ˜a7 denote information bits sent into NR encoder 110, and a0 . . . a7b0 . . . b7 denote coded bit sequence out of NR encoder 110. As NR code is systematic, the coded bits out of NR encoder 110 include information bits (a0 . . . a7) and redundant bits (b0 . . . b). The mapping between (a0 . . . a7) and (b0 . . . b7) is detailed in DTMB design specification.
FIG. 3 shows operation of the 4-quadrature amplitude modulation (4QAM) mapper 120. The 4QAM mapper 120 maps 16 coded bits into 8 4QAM symbols. The LLR computation device 130 computes LLRs for the LDPC decoding. In IEEE paper “Simplified Soft-Output Demapper for Binary Interleaved COFDM with Application to HIPERLAN/2” proposed by Filippo T. and Paola B, the LLRs associated with coded bits can be calculated based on associated received QAM symbols as well as corresponding channel state information. Such an LLR calculation proposed in that paper, however, does not consider and describe how to take into account the hard decision (HD) associated with the QAM symbols provided by the inner code, and thus is not suitable for scheme with LDPC code cascaded with an inner code.
In US Patent Publication No. 2007/0260959, it calculates LLRs based on QAM symbols, and employ skill of piecewise linear approximation. However, they still do not consider the use of hard decision (HD) information associated with the QAM symbols. Furthermore, it considers AWGN channel only, instead of multi-path channels as encountered in practical terrestrial broadcasting environment.
Though not mentioned insofar, it is desirable to devise and provide a complete decoding system applicable to wireless systems that employ LDPC code cascaded with an inner code, such as 4QAM-NR code, to mitigate and/or obviate problems encountered in versatile practical wireless channels for terrestrial broadcasting.